Home

Introduction

I have completed my PhD from Department of Electrical Engineering at National Central University, Taiwan (2019-2023). I have completed my Bachelor of Electrical Engineering from Namal College, Pakistan (2011-2015), and Master of Electrical Engineering from Department of Electrical Engineering at National Central University, Taiwan (2016-2018).

Research Areas

In the past, I have worked on the low-power implementation of digital hardware designs for digital signal processing and data compression. In PhD, my research focused on On-Chip learning of Deep Neural Networks (DNNs). I designed DNN algorithm for Incremental Learning (IL) such that it can be implemented on a low-power ASIC. Moreover, I explored the areas of edge-optimized incremental learning methods and transfer learning to make training possible on the edge devices without the need of sending data back to the server for training purposes.

Recent Work Experience

After finishing PhD, I have been working in area of Design for Testing (DFT) for IC design. I have been responsible for DFT flows development, enhancement, and training of project teams. The list of DFT projects that I have worked on include HPC (AI and traditional) chips, automotive chips, processors, micro-controllers, etc. I have hands-on experience with 3nm to 45nm TSMC technologies being used in DFT implementation.